This thesis proposes a novel implementation of a Doherty power amplifier as a means to improve backed off power added efficiency when compared to a class B PA. The proposed Doherty output combiner boasts a 28.5% fractional bandwidth at a center frequency of 28GHz. The proposed Doherty amplifier was laid out and manufactured in 45nm RF SOI. The simulated version has a saturated output power of 21dBm and a backed off efficiency improvement of 7% compared to that of a comparable class AB amplifier with a peak PAE of 25%. While the final manufactured Doherty amplifier did not line up with simulated expectations the design of a novel Doherty combiner is shown in this thesis.