A Novel Clock Distribution System with Injection Locked Rotary Traveling Wave Oscillator and Built-In Self-Test

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Bai, Zhanjun




The thesis implemented a clock distribution system with novel Injection Locked Rotary Traveling Wave Oscillators (IL-RTWOs) and Built-In Self-Test (BIST). Both trans-conductance injection locking and pulse injection locking techniques are explored. The combination of switched Metal-Insulator-Metal capacitors (MIM-caps) and a novel use of Complementary Varactor Pairs (CVPs) target a 1.7 GHz to 2.0 GHz frequency tuning range and 100 kHz frequency resolution. The Complementary Varactor Pairs (CVPs) implemented for RTWO phase tuning achieves 56° phase tuning range and 0.34° worst case phase tuning resolution. The RTWO scheme is implemented in IBM’s 130 nm CMOS technology. The RTWO free running phase noise is -126dBc/Hz at 1MHz offset from 2 GHz operating frequency. With the injection locking techniques, the RTWO inband phase noise is further reduced. This project also describes a Built-In Self-Test (BIST) circuit used to verify and tune the timing integrity of the clock distribution system. The die area is limited by the outer parameter of the RTWOs – leaving internal space for other circuits. The BIST circuit occupies 0.025 mm^2 chip area. The BIST circuit allows testing of the integrity of the clock distribution system at speed by determining if the system clock skew can be tolerated or needs adjustment. The clock distribution network consumes a total of 26.5 mA current from a 1.14 V power supply. The close-in spurs of the IL-RTWO are 79 dB lower than the output spectrum. The IL-RTWO attains an inband phase noise performance of -132 dBc/Hz at 100 kHz offset from 2.039 GHz output and its integrated rms jitter from 1 kHz to 40 MHz offset frequency is 39 fs. The pulse and transconductance injector circuits are analyzed and measured and it is shown that the pulse injector tends to achieve better phase noise performance. To the author’s best knowledge, the implementation of CVPs and injection locked techniques on RTWO, and the implementation of this BIST technique to determine clock integrity of an injection locked clock distribution network have not been explored previously.


Engineering - Electronics and Electrical




Carleton University

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Engineering, Electrical and Computer

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Theses and Dissertations

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