Nowadays one of the main concerns in the process of nanoscale design and fabrication is uncertainties of geometrical and physical parameters. This problem is due to the difficulty of controlling geometrical and physical parameters during the fabrication process. As a result, the nominal parameter values in pre-fabrication will be different from post-fabrication and can lead to undesired output signals. The traditional solution to estimate the impact of these variations on responses is applying Monte Carlo (MC) simulation, but the drawback is that, this solution needs large samples to converge and as a result is too time consuming, especially for large circuits. Recently, approaches based on polynomial chaos (PC) have been applied to this issue which had considerable computational advantages in comparison to (MC), but the problem is mainly addressed only for linear circuits. This thesis describes a new approach to extend the variability analysis based on PC technique to nonlinear circuits by using Hermite polynomials. The proposed approach enables interconnects and package modules whose macromodels have their variability characterized using the PC, to be used in general nonlinear circuits. This allows the PC variability analysis to be performed directly in the time domain. Also this thesis presents a new approach aimed at limiting the growth of the computational cost of variability analysis, of nonlinear circuits, using the Hermite-based Polynomial Chaos (PC), with the increase in the number of random variables. The proposed technique is based on deriving a closed-form formula for the structure of the augmented Jacobian matrix generated by the PC approach, and then showing that this structure can be approximated with a different structure that can be decoupled into independent diagonal blocks.