Sensitivity analysis and optimization of high-speed VLSI interconnects.

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Creator: 

Lum, Stephen

Date: 

1991

Subject: 

Very High Speed Integrated Circuits -- Design -- Evaluation
Electric Contacts -- Evaluation
Integrated Circuits -- Very Large Scale Integration

Language: 

English

Publisher: 

Carleton University

Thesis Degree Name: 

Master of Engineering: 
M.Eng.

Thesis Degree Level: 

Master's

Thesis Degree Discipline: 

Engineering, Electrical

Parent Collection: 

Theses and Dissertations

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