Current mode logic latch and prescaler design optimization in 0.18um CMOS technology

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Creator: 

Usama, Muhammad

Date: 

2005

Subject: 

Electronic circuit design.
Logic circuits.
Metal oxide semiconductors, Complementary -- Design and construction.
Very high speed integrated circuits.

Language: 

English

Publisher: 

Carleton University

Thesis Degree Name: 

Master of Applied Science: 
M.App.Sc.

Thesis Degree Level: 

Master's

Thesis Degree Discipline: 

Engineering, Electrical

Parent Collection: 

Theses and Dissertations

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