A Miniaturized Delay-Line Discriminator

This thesis presents the design of a miniaturized delay-line discriminator (DLD) array for electronic warfare (EW) applications. Over very wide bandwidths, delay-line discriminators can provide the high accuracy, low latency measurements desired in many EW systems. The drawback to these circuits is that they can be quite bulky due to the long time delays they require. To miniaturize the discriminator's delay line, the design employed a slow-wave transmission line that allowed for a length reduction of approximately 60 %. An array consisting of four discriminators with delay ratios of 1, 2, 4, and 16 was fabricated on a 4-layer printed circuit board. The design obtained a measurement range of over 2 GHz with better than 4MHz RMS accuracy. Additional processing of the discriminators' outputs is required to further improve this accuracy. Measurements of pulses with phase and frequency modulation present have demonstrated the potential for the identifification of these modulation schemes.