Multilevel optimization of high speed VLSI interconnect networks by decomposition.

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Creator: 

Wei, Yuji

Date: 

1994

Subject: 

Integrated Circuits -- Very Large Scale Integration
Very High Speed Integrated Circuits
Algorithms
Signal Processing

Language: 

English

Publisher: 

Carleton University

Identifier: 

Proquest Record
Library Catalogue Record
https://doi.org/10.22215/etd/1994-02825

Thesis Degree Name: 

Master of Engineering: 
M.Eng.

Thesis Degree Level: 

Master's

Thesis Degree Discipline: 

Engineering, Electrical

Parent Collection: 

Theses and Dissertations

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