Scalable Parallel Simulation of General Electrical Circuits

As circuit sizes increase, a means to improve the performance of simulations is constantly demanded, without sacrificing the accuracy of the results. Traditionally, improvements were obtainable through the raw increase of computational power of computing platforms, which allow the sequential algorithms used in circuit simulation to perform at a faster rate. Recently, however, these performance improvements are no longer obtained through the improvement of individual processors, but rather by including more processors in the system. The result is that higher performance is now obtained via exploiting multicore processors, distributed clusters, and cloud platforms. Traditional sequential algorithms cannot take advantage of the improvements promised by these new systems. Existing parallel algorithms for circuit simulation are based on the domain decomposition approach. However, it has been demonstrated that domain decomposition suffers scalability problems as the number of processors in a system increases. To address this problem, a new parallel circuit simulation algorithm is presented that allows modern multicore and distributed processors to be exploited to realize this performance improvement. These improvements are obtained without sacrificing accuracy or resorting to iterative techniques. The scalability improvements using the proposed algorithm have been demonstrated through the consideration of several industrial examples.