Fabrication and modelling of V.M.O.S. devices.
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V-channel VMOS devices have been investigated from the point of view of fabrication process and their modelling. A fabrication process for p-channel VMOS devices having a wide range of channel lengths has been developed. Two new VMOS structures, namely a 'flat bottom VMOS' device and a depletion type p-channel VMOS device, have been introduced for the first time. The existing models of a planar MOS transistor and the VMOS transistor are briefly reviewed. The VMOS transistor model proposed by Holmes and Salama was checked for validity against the observed characteristics of p-channel devices fabricated in the laboratory and shown not to correlate with the observed device behaviour. A new VMOS device model based on the assumption of non-constant oxide charge density in the V-groove, as a consequence of the geometric structure, has been developed using conformal mapping techniques. This model shows a close correlation between calculated and measured device characteristics in the triode and saturation regions for p-channel MOS devices. A model for the n-channel VMOS transistor has also been proposed.
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This work is available on request. You can request a copy at https://library.carleton.ca/forms/request-pdf-copy-thesis
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Copyright © 1976 the author(s). Theses may be used for non-commercial research, educational, or related academic purposes only. Such uses include personal study, research, scholarship, and teaching. Theses may only be shared by linking to Carleton University Institutional Repository and no part may be used without proper attribution to the author. No part may be used for commercial purposes directly or indirectly via a for-profit platform; no adaptation or derivative works are permitted without consent from the copyright owner.
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- 1976
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